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Computing with Electronic Nanotechnologies

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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2653))

Abstract

Computing with electronic nanotechnologies is emerging as a real possibility. In this talk we explore the role theoretical computer scientists might play in understanding such technologies and give examples of completed research.

We consider two representative problems, whether nanowire (NW) address decoders can be self-assembled reliably and whether data can be stored efficiently in crossbar nanoarrays, a means for data storage and computation.

Recent research suggests that address decoders for a set of parallel NWs can be realized using modulation doping. This is a process in which NWs are grown with embedded electronic switches (field-effect transistors (FETs)) that can be controlled by microwires. h-hot addressing allows a small number of microwires to activate one NW by activating its h FETs. We examine the feasibility of stochastically self-assembling an address decoder using such technology.

The crossbar array, two orthogonal sets of parallel wires placed one above the other, is one of the most promising nanotechnology architectures under consideration. Small crossbars have been self-assembled from carbon nanotubes (CNTs) and semiconducting NWs. Two media for binary data storage in nanoarrays have been proposed, namely, changing the state of molecules layered between orthogonal sets of wires and making or breaking mechanical contacts between these wires.

Since nanoarrays are expected to be very large, we examine two key questions: (a) “What are the most efficient ways of entering data into such arrays?” and (b) “How difficult is it to find a minimal or near-minimal number of steps to program an array using h-hot addressing when either 1s or 0s can be written into subarrays on each step?”

A partial answer to (a) is that some commonly occurring arrays can be programmed much more rapidly when both 1s and 0s can be written than when only 1s can be written. The answer to (b) is that it is NP-hard unless the number of 1s in each row or column is bounded or h is large.

This research was funded in part by NSF Grant CCR-0210225.

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© 2003 Springer-Verlag Berlin Heidelberg

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Savage, J.E. (2003). Computing with Electronic Nanotechnologies. In: Petreschi, R., Persiano, G., Silvestri, R. (eds) Algorithms and Complexity. CIAC 2003. Lecture Notes in Computer Science, vol 2653. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44849-7_8

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  • DOI: https://doi.org/10.1007/3-540-44849-7_8

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-40176-6

  • Online ISBN: 978-3-540-44849-5

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