Abstract
An analog VLSI implementation of adaptive synapses being part of an associative memory realised with pulsed neurons is presented. VLSI implementations of dynamic synapses and pulsed neurons are expected to provide robustness and low energy consumption like observed in the human brain. We have developed a VLSI implementation of synaptic connections for an associative memory which is used in a biological inspired image processing system using pulse coded neural networks. The system consists of different layers for feature extraction to decompose the image in several features. The pulsed associative memory is used for completing or binding features. In this paper, we focus on the dynamics and the analog implementation of adaptive synapses. The discussed circuits were designed in a 130 nm CMOS process.
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Kaulmann, T., Ferber, M., Witkowski, U., Rückert, U. (2005). Analog VLSI Implementation of Adaptive Synapses in Pulsed Neural Networks. In: Cabestany, J., Prieto, A., Sandoval, F. (eds) Computational Intelligence and Bioinspired Systems. IWANN 2005. Lecture Notes in Computer Science, vol 3512. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11494669_56
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DOI: https://doi.org/10.1007/11494669_56
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-26208-4
Online ISBN: 978-3-540-32106-4
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