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An energy-efficient and ultra-low-voltage power oscillator in CMOS 65 nm

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Abstract

In a direct modulation scheme and particularly in portable and wireless sensor network applications, the oscillator limits the transmitter efficiency therefore, the oscillator efficiency is critical and high-efficiency and high-power oscillators are increasingly required. This paper presents a high-efficiency and ultra-low-voltage power oscillator that operates at 2.4 GHz and is implemented in 65 nm CMOS technology. The power oscillator is a self-oscillating class-E power amplifier (PA) that utilizes a positive feedback system. A class-E PA is selected due to its high efficiency. The power oscillator has an optimized power consumption and output power, where a 2.4 mW power consumption is achieved under a 0.4 V power supply. The proposed oscillator demonstrates a maximum output power of \(-0.45\) dBm and a peak efficiency of 37.5%. The oscillator is tunable between 1.66 and 2.78 GHz. The oscillator is robust to a \(\pm\,15\%\) frequency deviation from a 2.44 GHz nominal frequency due to process, voltage, temperature variation.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, Dalhousie University, Halifax, NS, B3H 4R2, Canada

    Zina Saheb & Ezz El-Masry

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  1. Zina Saheb
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  2. Ezz El-Masry
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Correspondence to Zina Saheb.

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Saheb, Z., El-Masry, E. An energy-efficient and ultra-low-voltage power oscillator in CMOS 65 nm. Analog Integr Circ Sig Process 100, 149–156 (2019). https://doi.org/10.1007/s10470-019-01431-z

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  • DOI: https://doi.org/10.1007/s10470-019-01431-z

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