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Journal of Parallel and Distributed Computing
Volume 61, Issue 6, June 2001, Pages 767-783
 
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doi:10.1006/jpdc.2000.1712    How to Cite or Link Using DOI (Opens New Window)
Copyright © 2001 Academic Press. All rights reserved.

Regular Article

The Shared Control Parallel Architecture Model

Nael B. Abu-Ghazaleha and Philip A. Wilseyb

a Department of Computer Science, SUNY Binghamton, Binghamton, New York, 13902–6000 b Experimental Computing Laboratory, University of Cincinnati, Cincinnati, Ohio, 45221–0030

Received 1 June 1998; 
revised 1 August 2000; 
accepted 1 October 2000. ;
Available online 26 February 2002.

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Abstract

SIMD machines are considered special purpose architectures chiefly because of their inability to support control parallelism. This restriction exists because there is a single control unit that is shared at the thread level; concurrent control threads must time-share the control unit (they are sequentially executed). We present an alternative model for building centralized control architectures that allows better support for control parallelism. This model, called shared control, shares the control unit(s) at the instruction level. More precisely, in each cycle the control signals for all the supported instructions are broadcast to the PEs. In turn, each PE receives its control by synchronizing with the control unit responsible for its local instruction. The shared control model is fundamentally different from the SIMD model. There are a number of architectural issues that must be resolved in order for this model to be useful. This paper identifies some of these issues and discusses their respective trade-off spaces. An integrated shared-control/SIMD architecture design (SharC) is presented and used to demonstrate the relative performance relative to a SIMD architecture.

Author Keywords: control parallelism; data parallelism; shared control; SIMD


 
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